Field of the Invention
The present invention relates to a patterning process using a BPSG (Boron Phosphorus Silicon Glass) film as a resist under layer film in the multilayer resist method.
Description of the Related Art
In 1980s, photo-exposure using a g-beam (436 nm) or an i-beam (365 nm) of a mercury lamp as a light source had been widely used in the resist patterning. As a means for further finer patterning, shifting to a shorter wavelength of the exposure light was assumed to be effective, so that, in mass production process after the DRAM (Dynamic Random Access Memory) with 64 MB (work size of 0.25 μm or less) in 1990s, a KrF excimer laser (248 nm), a shorter wavelength than the i-beam (365 nm), had been used in place of the i-beam as the exposure light source.
However, in production of DRAMs with integration of 256 MB and 1 GB or higher which require further finer process technologies (work size of 0.2 μm or less), a light source with further short wavelength is required, and thus, a photolithography using an ArF excimer laser (193 nm) has been investigated seriously since about a decade ago. At first, the ArF lithography was planned to be applied to manufacturing of a device starting from a 180 nm-node device, but the life of the KrF excimer lithography was prolonged to mass production of the 130 nm-node device; and thus, a full-fledged application of the ArF lithography started from the 90 nm-node.
Further, mass production of the 65 nm-node device is now underway by combining it with a lens having an increased numerical aperture (NA) till 0.9. Further shortening of wavelength of the exposure light is progressing for the next 45 nm-node device; and the F2 lithography with 157 nm wavelength became a candidate for it. However, there are many problems in the F2 lithography: cost-up of a scanner due to use of the large quantities of the expensive CaF2 single crystal for a projection lens; extremely poor durability of a soft pellicle, which leads to change of an optical system due to introduction of a hard pellicle; decrease in etching resistance of a resist film, and so forth. Because of these problems, development of the F2 lithography was suspended, and the ArF immersion lithography was introduced. In the ArF immersion lithography, water having refractive index of 1.44 is introduced between a projection lens and a wafer by a partial fill method thereby enabling high speed scanning; and thus, mass production of the 45 nm-node device is now underway by using a lens with a NA class of 1.3.
For the 32 nm-node lithography technology, which is the next fine processing technology, lithography with a Extreme-ultraviolet beam (EUV) of 13.5 nm wavelength is considered to be a candidate. Problems to be solved in the EUV lithography are to obtain a higher output power of the laser, a higher sensitivity of the resist film, a higher resolution power, a lower line edge roughness (LER), a non-defect MoSi laminate mask, a lower aberration of the reflective mirror, and so forth; and thus, there are innumerable problems to be solved. Development of the immersion lithography with a high refractive index, another candidate for the 32 nm-node, was suspended, because transmittance of LUAG, a candidate for a high refractive index lens, is low, and refractive index of the liquid could not reach an aimed value of 1.8. As mentioned above, in the photo-exposure used as a general technology, resolution power based on the wavelength of a light source is approaching to its inherent limit.
Accordingly, development of a fine processing technology for obtaining a work size exceeding a limiting resolution of an existing ArF-immersion exposure technology has been promoted. As a technology thereof, double patterning technology is being proposed. Specifically, the double patterning technology is a method (method (1)) for forming a first photoresist pattern by first exposure and development with an interval rate of a line to a space of 1:3; processing an under layer hard mask by dry etching; laying another hard mask thereon; forming a second line pattern by second exposure and development of a photoresist film at a space portion obtained by the first exposure; processing the hard mask by dry etching; to form the first pattern and the second pattern alternately. By this method, it is possible that forming a line and space pattern whose pitch is half that of an exposure pattern.
Also, there is another method (method (2)) for forming a first photoresist pattern by first exposure and development with an interval rate of a line to a space of 3:1; processing an under layer hard mask by dry etching; forming a pattern on a remaining portion of the hard mask by applying a photoresist film on the under layer hard mask and second exposure; and processing the hard mask by dry etching with the pattern as a mask. In both methods, the hard mask is processed by dry etching twice, and a pattern whose pitch is half that of an exposure pattern can be formed. In the method (1), the hard mask has to be formed twice. On the other hand, in the method (2), the hard mask has to be formed once, but a trench pattern which is more difficult to resolve than a line pattern has to be formed.
Another method (method (3)) proposed is a method for forming a line pattern with a positive resist film in X direction by using a dipole light; curing a resist pattern; applying a resist composition thereon again; exposing a line pattern in Y direction by using a dipole light, to form a hole pattern from a gap of a grid-like line pattern (Non-Patent Document 1). Moreover, a method for halving a pitch with one-time pattern exposure by using spacer technology in which a resist pattern, an organic hard mask or a polysilicon film having a transferred pattern is regarded as a core pattern, and the core pattern is removed by using dry etching etc., after forming a silicon oxide film around the core pattern at a low temperature, is being proposed.
Accordingly, since finer processing is difficult to achieve only by using a photoresist film, a finer patterning process cannot readily be introduced without using a hard mask formed under the resist film. Under the circumstances, multilayer resist method is known as a method for using a hard mask as a resist under layer film. The method is that a middle layer film (e.g. a silicon-containing resist under layer film), whose etching selectivity is different from a photoresist film (i.e. a resist upper layer film), is formed between the resist upper layer film and a substrate to be processed; a pattern is formed to the resist upper layer film; then the pattern is transferred to the resist under layer film by dry etching using the resist upper layer film pattern as a dry etching mask; and further the pattern is transferred to the substrate to be processed or a core film of the spacer process by dry etching using the resist under layer film as a dry etching mask.
A composition for forming a silicon-containing resist under layer film as disclosed in Patent Document 1 or Patent Document 2, etc., has been proposed for a patterning process by the multilayer resist method in a manufacturing process of a semiconductor apparatus which exceeds the limit of resolution of ArF liquid immersion lithography in recent years.
In addition, in the cutting-edge semiconductor apparatus, technologies such as three-dimensional transistor and through interconnection, etc., have been used to improve properties of the semiconductor apparatus. In a patterning process for forming such a structure in the semiconductor apparatus, patterning by the multilayer resist method has also been carried out. In such a patterning, after pattern formation, there are cases where the process for removing the silicon-containing resist under layer film remaining on the pattern without causing damage to the pattern is required. If the removal is insufficient, more specifically, if the wafer is subjected to a subsequent manufacturing process while an object to be cleaned (i.e. a residue of the silicon-containing resist under layer film) remains thereon, yield of device production is surely lowered.
Accordingly, as a device progresses toward miniaturization, a higher cleaning degree is required in the cleaning process. However, main constitutional elements of the conventional silicon-containing resist under layer film and main constitutional elements of the semiconductor apparatus substrate are both silicon in many cases. Therefore, if one wishes to selectively remove the resist under layer film by dry etching, wet etching using a hydrofluoric acid type peeling solution, etc., there is a problem that the semiconductor apparatus substrate is damaged because constitutional components of the resist under layer film are similar to that of the semiconductor apparatus substrate. In addition, there is another problem that if a silicon-containing resist under layer film is used as a mask to process an under layer film just under the same by dry etching, the silicon-containing resist under layer film is modified by the dry etching, thereby hardly removed by subsequent wet etching.